Leader: Alessandro Ramalli (UNIFI DINFO); Other collaborator(s): Valentino Meacci (UNIFI)
This task proposes the development of a system for ultra-portable echography, compatible with the latest micro electro-mechanical systems technology and standard piezoelectric technology for transducers design, which will allow the monitoring of relevant cardio-vascular parameters directly at home, without the presence of clinical personnel. The system will be hand-held and could include a dedicated software to support non-trained individuals in obtaining the best ultrasound images. The TRL of arrival will be 3: a proof-of-concept will be experimentally demonstrated.
However, ultra-portable systems, given their limited size and low power budget, cannot fulfil the strict hardware requirements forced by state-of-the-art processing algorithms for the extraction of physiological parameters from ultrasound signals. Therefore, this task also aims at the development of low computational load processing algorithms, which will be compliant with the computational resources of ultra-portable systems.
The TRL is 4: the algorithms will be experimentally validated in lab environment by using an ultrasound open platform.
Brief description of the activities and of the intermediate results:
During the reporting period, from November 2023 to March 2024, we finished the schematic design for the three boards of the ultraportable ultrasound system. We focused on the schematic design of the two daughterboards responsible for ultrasound signal transmission and reception. The transmission daughter board accommodates six tri-level pulsers (STHVUP32, STMicroelectronics), with transmission/reception switches. They can independently handle up to 192 array elements on the probe and generate signals within a range of +/-100V. The reception daughterboard houses two integrated analog front-end (AFE) chips (AFE5832LP, Texas Instruments) and one field programmable gate array (FPGA, Xilinx Artix 7 XC7A100T, AMD) to digitize and process the received echoes in real-time across 64 channels, which are multiplexed to 192 transducers. The two 32-channel AFE chips transfer data at 50 MHz and 10 bits to the FPGA through 32 low-voltage differential signaling (LVDS) interfaces. Each LVDS interface serves 2 analog-to-digital (ADC) converters, achieving a total bandwidth of 30 Gbit/s. The FPGA also manages the configuration of AFEs and pulsers. Both daughterboards feature connectors designed to facilitate the arrangement of the system, comprising the motherboard and the two daughterboards, in a stacked configuration. Moreover, the transmission daughterboard houses a connector to link the ultrasound probe.
Please see the next reporting period.
At this stage, the printed circuit boards (PCB) of the three boards have been completed to be arranged in a vertical stack to optimize space and facilitate future upgrades. The transmission daughterboard (TDB), reception daughterboard (RDB), and motherboard (MB) have 16, 12, and 8 layers, respectively, ensuring proper analog signal routing while minimizing interference and crosstalk. The stacked system measures 10 cm by 5 cm by 1.5 cm, with connectors that manage power and high-speed signals. Preliminary hardware and FPGA firmware tests have been successfully conducted on the fully assembled PCBs.
Regarding FPGA firmware, we have successfully implemented essential functional blocks for the FPGA firmware, including: The Deser block to deserialize high-speed data from the AFE and transfers it to the FIFOs for raw data storage. The USB block, which manages high-speed data transfer and configuration between the FPGA and the host. The Tx block that controls pulsers and configures transmission parameters. The config Block to set reception and transmission parameters. The scheduler block which coordinates system operations. Furthermore, a beta version of the software has been developed to initialize the system and configure transmission and reception parameters. This software includes signal plotting capabilities and the option to save acquired data as binary files.
Electrical tests on the ultra-portable system were conducted. All power supplies were verified, ensuring the correct power-on sequence for the three boards. Connections and communications between the various devices were also confirmed. Finally, the electrical functionality and responsiveness of the programmable devices were tested.
Functional tests were conducted using a specially designed and printed probe adapter board to interface the system with ultrasound probes commonly used in clinical and research settings, enabling extensive testing with a wide range of probes. The transmission capability of the daughterboard was verified by acquiring, via an oscilloscope, the square wave signals generated by the programmable pulsers and transferred to the probe elements. The reception capability was assessed by acquiring echo signals, which were amplified, filtered, converted from analog to digital, and saved in the system memory. For this test, all elements of a commercial probe transmitted simultaneously, thus generating a plane wave, while the probe was immersed in a water tank in front of a highly reflective metal plate.
On the FPGA firmware side, major upgrades were made to optimize both performance and functionality, enabling the system to acquire and transfer data to the host PC with bandwidths of up to 3 Gb/s. This improvement requires a comprehensive redesign of the software to efficiently handle the increased bandwidth. Consequently, a more advanced version of the software is under development. This new version aims not only to manage the enhanced bandwidth but also to improve user-friendliness in controlling the system’s main settings and displaying output images.
Scientific publications
Dissemination events